NOR Logic
Description
In this activity you will revisit the voting booth monitoring system introduced in Activity 2.2.3 NAND Logic Design. Specifically, you will be implementing the NOR only combinational logic circuits for the two outputs Booth and Alarm. In terms of efficiency and gate/IC utilization, these NOR only designs will be compared with the previously designed AOI and NAND implementations.
Conclusion Questions
1. For my NOR implementations, I ended up using two IC chips.
2. AOI implementation uses more IC chips than NOR does.
3. Using NOR implementation also decreases the usage of chips than in NAND wiring.
4. No, I don't think that these chips are appropriate for this project because it requires a NAND gate along with the other NOR gates. TOO MUCH TO DEAL WITH.
2. AOI implementation uses more IC chips than NOR does.
3. Using NOR implementation also decreases the usage of chips than in NAND wiring.
4. No, I don't think that these chips are appropriate for this project because it requires a NAND gate along with the other NOR gates. TOO MUCH TO DEAL WITH.